1. Field
Exemplary embodiments of the present invention relate to a memory and a memory system, and more particularly, to a technology relating to a read-retry operation of a memory.
2. Description of the Related Art
Memory devices are divided into a volatile memory device and a nonvolatile memory device depending on whether the memory devices keep the data when supply of power is stopped. The volatile memory device is a memory device in which data is deleted when supply of power supply is interrupted, a DRAM and an SRAM pertain to the volatile memory device. The nonvolatile memory device is a memory device that keeps the stored data even if supply of power is stopped and a flash pertains to the nonvolatile memory device.
FIG. 1A illustrates threshold voltage distribution of Single-Level Cell (SLC) memory cells in a flash memory and FIG. 1B illustrates threshold voltage distribution of Multi-Level Cell (MLC) memory cells.
Referring to FIG. 1A, programmed memory cells have distribution of threshold voltage indicated by P and non-programmed (that is, erased-state) memory cells have distribution of threshold voltage indicated by E. The voltage that is used to discriminate the programmed state P and the erased state E is a read voltage VREAD, and the read voltage is set at an appropriate level that makes it possible to discriminate the programmed state P and the erased state E. In a flash memory, the distribution of threshold voltage may be changed according to repetition of programming and erasing the memory cells or according to the influence from the peripheral cells. When the cell distribution changes as indicated by the dotted lines and reading is performed by using the read voltage VREAD in the related art, it can be seen that a read fail of recognizing the data of the memory cells in the programmed state wrong as being in the erased state may be generated.
On the other hand, this problem may become more serious in MLC memory cells using a plurality of read voltages VREAD1, VREAD2, and VREAD3 and having a small margin among the distributions E, P1 P2, and P3.
The read-retry operation performs a read-retry operation again by changing the level of a read voltage when reading fails. Referring to FIGS. 2A and 2B, it can be seen that reading is achieved by performing reading several times with changes in level of the read voltages VREAD, VREAD1, VREAD2, and VREAD3 in order of (1)→(2)→(3). That is, the read-retry operation performs reading again while changing the level of the read voltages VREAD, VREAD1, VREAD2, and VREAD3 until reading is achieved, when reading falls.
FIG. 3 is a diagram illustrating a read voltage generation circuit of the related art for supporting a read-retry operation.
Referring to FIG. 3, the level of a read voltage VREAD that should be produced in every reading is stored in a plurality of in registers 301 to 304. A read voltage code CODE1 for the first reading is stored in the register 301, a read voltage code CODE2 for second reading (that is, the first read-retry operation) is stored in the register 302, and a read voltage code CODEN for the N-th reading is stored in the register 304.
The voltage generation circuit 310 generates a read voltage VREAD corresponding to the value of the read voltage code CODE1 in the first reading and generates a read voltage VREAD corresponding to the value of the read voltage code CODE2 in the second reading. Further, the voltage generation circuit 310 generates a read voltage VREAD corresponding to the value of the read voltage code CODEN in the N-th reading.
In such a type of read voltage generation circuit, the registers 301 to 304 should be store the read voltage codes CODE1 to CODEN. Therefore, many registers 301 to 304 may be needed and the area of the read voltage generation circuit increases. Further, it may be necessary to generate at least three read voltages VREAD1 VREAD2, and VREAD3 in order to support the MLC type of reading, so that the number of registers greatly increases to 3*N. Further, since it may be necessarily required to use the read voltage codes CODE1 to CODEN that have been stored in the registers 301 to 304, there is a concern that it may be difficult to variously adjust the level of the read voltage VREAD.